Student Work
Crypto Acceleration Using Asynchronous FPGAs
PublicDownloadable Content
open in viewerThe goal of this project, sponsored by General Dynamics C4 Systems, is to evaluate proprietary FPGA technology developed by Achronix Semiconductor Corporation and its effectiveness using a 128-bit, one clock cycle multiplier in a finite field, GF(2128), as a test application. The testing will determine if there is a significant increase in speed that can be achieved by simple modifications of existing synchronous HDL designs using three metrics: number of LUTs, number of registers, and clock speed.
- This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.
- Creator
- Publisher
- Identifier
- E-project-042308-101647
- Advisor
- Year
- 2008
- Sponsor
- Date created
- 2008-04-23
- Location
- Needham
- Resource type
- Major
- Rights statement
Relations
- In Collection:
Items
Items
Thumbnail | Title | Visibility | Embargo Release Date | Actions |
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MQP_Paper_Final.pdf | Public | Download | ||
MQP_Paper_Final.doc | Public | Download |
Permanent link to this page: https://digital.wpi.edu/show/c821gm32p