The Multifunction Phased Array Radar (MPAR) project at Lincoln Laboratory is currently in its pre-prototype hardware design phase. A FPGA based evaluation board will be used to test the front end hardware of the phased array radar. The focus of this project was to develop an interface board which facilitates the communication between the FPGA and the radar panel. The interface board has the responsibility of terminating and level shifting the digital signals at the input, buffering each of the outputs, and fanning-out a number of the digital signals. A PCB was developed and hardware tests showed that the first revision of the interface board was a success. However, the tests concluded that there exists too much ringing on the output waveforms for the signals to be usable under MPAR.

• This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.

Creator

• Goodrich, Calvin C.
• Svirchuk, Boris A.

Publisher

• Worcester Polytechnic Institute

Identifier

• E-project-101608-124009

Advisor

• Clancy, Edward A.

Year

• 2008

Center

• MIT Lincoln Laboratory-Lexington, Massachusetts Project Center - MQP

Sponsor

• MIT Lincoln Laboratory

Date created

• 2008-10-16

Resource type

• Major Qualifying Project

Major

• Electrical & Computer Engineering

Rights statement

• In Copyright