The performance of a dedicated A/D converter located beneath each pixel is explored in this thesis. Specifically, a voltage to frequency converter coupled with a direct injection amplifier designed for use with an IR focal plane array is analyzed. This versatile implementation of a Readout Integrated Circuit can be found applicable to a wide variety of imaging technologies. Noise performance of the conversion system is theoretically calculated, and is supported by SPICE simulations using valid CMOS SPICE models. It is shown that a 10 transistor sub-pixel voltage to frequency analog to digital converter will produce noise that is less than the input shot noise. Design considerations will be addressed to ensure continued performance as the scale of the imagers increase to large format arrays.
Worcester Polytechnic Institute
Electrical & Computer Engineering
All authors have granted to WPI a nonexclusive royalty-free license to distribute copies of the work. Copyright is held by the author or authors, with all rights reserved, unless otherwise noted. If you have any questions, please contact firstname.lastname@example.org.
Colonero, Curtis Benson, "Noise Analysis and Simulation of a Sub-Pixel Analog to Digital Voltage-To-Frequency Converter for use with IR Focal Plane Arrays" (2007). Masters Theses (All Theses, All Years). 36.
Sub-Pixel, A/D, Voltage-To-Frequency, Converter, Noise Analysis, Simulation, IR, Focal Plane Array, FPA