Faculty Advisor or Committee Member

Kathi Fisler, Advisor

Faculty Advisor or Committee Member

Gary Pollice

Identifier

etd-042908-140922

Abstract

Hardware engineers frequently create formal specification documents as part of the verification process. Doing so is a time-consuming and error-prone process, as the primary documents for communications and standards use a mixture of prose, diagrams and tables. We would like this process to be partially automated, in which the engineer's role would be to refine a machine-generated skeleton of a specification's formal model. We have created a preliminary intermediate language which allows specifications to be captured using formal semantics, and allows an engineer to easily find, understand, and modify critical portions of the specification. We have converted most of ARM's AMBA AHB specification to our language; our representation is able to follow the structure of the original document.

Publisher

Worcester Polytechnic Institute

Degree Name

MS

Department

Computer Science

Project Type

Thesis

Date Accepted

2008-04-29

Accessibility

Unrestricted

Subjects

hardware verification, language, timing diagrams, aspect-oriented programming, Electronic data processing documentation, Specification writing

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