Faculty Advisor

Clancy, Edward A.

Center

MIT Lincoln Laboratory

Abstract

The Multifunction Phased Array Radar (MPAR) project at Lincoln Laboratory is currently in its pre-prototype hardware design phase. A FPGA based evaluation board will be used to test the front end hardware of the phased array radar. The focus of this project was to develop an interface board which facilitates the communication between the FPGA and the radar panel. The interface board has the responsibility of terminating and level shifting the digital signals at the input, buffering each of the outputs, and fanning-out a number of the digital signals. A PCB was developed and hardware tests showed that the first revision of the interface board was a success. However, the tests concluded that there exists too much ringing on the output waveforms for the signals to be usable under MPAR.

Publisher

Worcester Polytechnic Institute

Date Accepted

October 2008

Major

Electrical and Computer Engineering

Project Type

Major Qualifying Project

Accessibility

Unrestricted

Advisor Department

Electrical and Computer Engineering

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