This project, done in conjunction with General Dynamics, involves the implementation of a large number multiplication algorithm on an FPGA-based PCI card. The end result is a PCI card that multiplies 1024-bit numbers together and returns a 2048-bit result. The group designed the PCI interface, buffering and RAM storage, internal control components, and status update system, interfacing them with a predesigned multiplier component. The project also includes the coding of support software for controlling and interfacing with the PCI card.
Worcester Polytechnic Institute
Major Qualifying Project
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Electrical and Computer Engineering